|
This stays HIGH when in idle and LOW when processing Read data.
|}
= Mapped Domains =
Reads or writes to these physical memory segments are mapped to the PI bus. For example, attempting to read from address 0x10000000 will cause a PI bus read at address 0x10000000. This means that even if a cartridge/device has data stored at addresses outside these segments, software running on the console will not be able to access it. Historically, each segment was intended for a different purpose. Game cartridges always expect software to read from the <code>0x10000000 - 0x1FBFFFFF</code> segment in order to access the game's ROM data. Custom hardware and software could potentially utilize any or all of these segments in different/unintended ways. Some flashcarts are known to use <code>0x1FD00000 - 0x7FFFFFFF</code> for special features or debugging.
{| class="wikitable"
! colspan=2 | Address Range !! Name !! Original Intended Usage
|-
| 0x05000000 || 0x05FFFFFF || Domain 2, Address 1 || N64DD control registers
|-
| 0x06000000 || 0x07FFFFFF || Domain 1, Address 1 || N64DD IPL ROM
|-
| 0x08000000 || 0x0FFFFFFF || Domain 2, Address 2 || Cartridge SRAM
|-
| 0x10000000 || 0x1FBFFFFF || Domain 1, Address 2 || Cartridge ROM
|-
| 0x1FD00000 || 0x7FFFFFFF || Domain 1, Address 3 || Unknown
|}
The domain number determines which PI timing/page settings apply to which memory segments. Thus, reads/writes to the cartridge ROM segment use the settings for domain 1. It's possible to configure certain characteristics of the communication protocol: latency, pulse-width, release, and page-size. Domain 1 is set automatically during [[Initial Program Load|IPL2]], by reading the first 4 bytes of the cartridge/device that's connected to the console at boot. Both domains can be configured by software at any time.
= Parallel Interface Registers =
|