RDRAM Interface
The RDRAM Interface (or RI) act as a controller of the RDRAM channel to which one or more RDRAM modules are daisy-chained. It converts memory accesses from the system into RDRAM protocol commands, to which RDRAM modules responds.
The memory area devoted to RDRAM Interface and RDRAM modules is divided as follow :
Address Range | Name | Description | |
---|---|---|---|
0x0000 0000
|
0x03EF FFFF
|
RDRAM memory | Allows to access RDRAM memory of configured module |
0x03F0 0000
|
0x03FF FFFF
|
RDRAM registers | Allows to access RDRAM register of configured module |
0x0470 0000
|
0x047F FFFF
|
RI registers | Allows to configure RDRAM Interface behavior |
Registers
RI_MODE 0x0470 0000
| ||||||||
---|---|---|---|---|---|---|---|---|
31:24 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
23:16 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
15:8 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
7:0 | U-? | U-? | U-? | U-? | RW-? | RW-? | RW-? | RW-? |
— | — | — | — | Stop_R | Stop_T | Op_Mode [1:0] |
READ/WRITE: [3] Enable/Disable controller Receive clock automatic stopping. [2] Enable/Disable controller Transmit clock automatic stopping. [1:0] Operating mode of RDRAM modules (not sure if it is the operating mode of the controller, if it makes the controller forward orders to place RDRAM modules in these states). 0: Reset. place device in known state after poweron. 1: Active. device is active and ready to receive requests. This mode consumes the most power and is not used directly. 2: Standby. device automatically transition to this state after servicing a transaction. This is the default operating mode. NOTE: some RDRAM datasheets mention a 4th mode PowerDown, but I'm not sure it is supported in N64 configuration. NOTE: transition between these states takes several cycles, so after setting them some delay is necessary for them to be effective.
RI_CONFIG 0x0470 0004
| ||||||||
---|---|---|---|---|---|---|---|---|
31:24 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
23:16 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
15:8 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
7:0 | U-? | RW-? | RW-? | RW-? | RW-? | RW-? | RW-? | RW-? |
— | AutoCC | CC [5:0] |
READ/WRITE: [6] Enable/Disable automatic current calibration from controller. TOVERIFY: When enabling AutoCC, CC value should set to zero. When disabling AutoCC (eg. manual current calibration), CC should be set to desired manual CC value. [5:0] Current Control value. TOVERIFY: When reading this field, we access the last latched value (latching is done by writing any value to RI_CURRENT_LOAD register). TOVERIFY: Also a delay should be observed to let CC value settle before latching it's value.
RI_CURRENT_LOAD 0x0470 0008
| ||||||||
---|---|---|---|---|---|---|---|---|
31:24 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
23:16 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
15:8 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — | |
7:0 | U-? | U-? | U-? | U-? | U-? | U-? | U-? | U-? |
— | — | — | — | — | — | — | — |
WRITE: TOVERIFY: Any write to this register latches internal Current Control value into RI_CONFIG CC field.
... TODO: remaining registers