VR4300

Revision as of 23:29, 4 August 2021 by Bigbass (talk | contribs) (Fixed broken code formatting)

The VR4300 is the CPU of the Nintendo 64, and is an NEC VR4300i with slight modifications. Running at 93.75 MHz, the VR4300 handles game logic, reading responding to controller input from the PIF, and preparing display lists and audio command lists for the RCP to draw and synthesize audio.

VR4300 Users Manual

Known Bugs

Some VR4300 CPUs contain the “VR4300 multiplication bug”. This causes incorrect results to be generated, under certain circumstances, after computing a floating-point multiplication. The bug was fixed in later processor steppings, and affects early model Nintendo 64 consoles generally NUS-01 (Japan Only), NUS-02 (Japan Only), NUS-03 (First US Revision).

GCC accepts the -mfix4300 flag, which tells GCC to generate code with a workaround for this bug—two nop instructions are inserted after every mul.s (fp), mul.d (fp) or mult (integer).

For example, consider this function: float mul(float x, float y) { return x * y; } Without the fix it may generate this code:

      jal mul
      nop
      mul.s   $f1,$f13,$f15
mul:
      jr      $31
      mul.s   $f0,$f12,$f14

The mul.s after the nop (red) may produce unexpected results, if the operands in the mul.s after the jr (yellow) include NaN, Zero or Infinity.

With the fix it may generate this code:

      mul.s   $f1,$f13,$f15
      nop
      jal mul
      nop
      nop
mul:
      mul.s   $f0,$f12,$f14
      jr      $31
      nop

Depending on the other instructions that can be reordered the nops could be other instructions that perform work, so this is a worst case scenario. There may be a ROM which tests if your hardware is affected by this bug, but determining based on the Motherboard revision is easier.