MIPS Interface: Difference between revisions
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Memory mapped registers are used to configure the MIPS Interface. The base address for these registers is <code>0x0430 0000</code>, also known as MI_BASE. However, because all memory accesses in the CPU are made using virtual addresses, the following addresses must be offset appropriately. For non-cached reads/writes, add <code>0xA000 0000</code> to the address. As an example, to directly write to the MI_MODE register, use address <code>0xA430 0000</code>.
''Some of these registers have different behavior when writing to them, than when reading from them.''
= Registers =
'''Table Notation:'''
<pre>
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