ROM Header

Revision as of 18:55, 26 March 2022 by Rasky (talk | contribs) (Initial version)
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The following table shows the standard contents of the ROM header. Most of the structure of the header is defined by the IPL3 routines commonly used in commercial games (which are actually contained in the ROM itself); only a few fields are accessed by IPL2 (which is burned in PIF ROM) and are thus hard-coded for all possible valid N64 ROMs.

Offset Bytes Name Description
0x00 4 PI DOM1 configura flags These flags are used by IPL2 to configure access to the ROM (which is mapped in the PI DOM1 space, see memory map). IPL2 first configure the PI to its slowest speed to be able to read these 4 bytes, and then use them to configure the correct speed to access the ROM.


All known commercial games use 0x80 0x37 0x12 0x40 in these bytes.


These fields could be tuned in replica cartridges to adapt to the actual maximum physical speed that the ROM can be accessed, but please pay attention that many emulators expect to find the 4 "standard" values here and actually use them as a "fixed ID" to detect if the ROM dump was byte-swapped.

0x04 4 Clock override(?) Usually 0
0x08 4 Initial PC Initial PC in RDRAM. IPL3 will jump to this address when it has finished initializing the hardware, to boot the ROM.
0x0C 4 ? ?
0x10 8 CRC Checksum calculated on 1 Mbyte of ROM contents starting from offset 0x1000 (after IPL3). This checksum is computed with a custom algorithm implemented by IPL3 that verifies the integrity of the ROM before booting it. If the checksum fails, IPL3 refuses to boot the ROM and hangs the console.


To see the exact algorithm used by IPL3, see the source code of the chksum64 tool shipped with libdragon.