RDRAM Interface: Difference between revisions
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The base address for these registers is <code>0x0470 0000</code>, also known as RI_BASE. However, because all memory accesses in the CPU are made using virtual addresses, the following addresses must be offset appropriately. For non-cached reads/writes, add <code>0xA000 0000</code> to the address. As an example, to directly write to the RI_MODE register, use address <code>0xA470 0000</code>. |
The base address for these registers is <code>0x0470 0000</code>, also known as RI_BASE. However, because all memory accesses in the CPU are made using virtual addresses, the following addresses must be offset appropriately. For non-cached reads/writes, add <code>0xA000 0000</code> to the address. As an example, to directly write to the RI_MODE register, use address <code>0xA470 0000</code>. |
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Some information is available in [https://patentimages.storage.googleapis.com/cc/33/96/6e54e1628ec0f9/US6593929.pdf US6593929.pdf] in paragraph "Example Memory Controller/Interface Registers" and associated figures (37A-H). |
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= Registers = |
= Registers = |
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