RDRAM Interface: Difference between revisions

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(Fill in RI_ERROR and RI_BANK_STATUS)
(More RI_ERROR research. Fix formatting errors.)
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| U-? || U-? || U-? || U-? || U-? || R-? || R-? || R-?
| U-? || U-? || U-? || U-? || U-? || R-? || R-? || R-?
|-
|-
| — || — || — || — || — || OverRange || Ack ? || NAck ?
| — || — || — || — || — || Over || Nack || Ack
{{#invoke:Register table|foot}}
{{#invoke:Register table|foot}}
{{#invoke:Register table|definitions
{{#invoke:Register table|definitions
| 31-3 | Undefined | Undefined
| 31-3 | Undefined | Undefined
| 2 | OverRange Error | Set when reading any addresses in the range <code>0x0080 0000</code> to <code>0x03EF FFFF</code>, even when an RDRAM bank has been mapped there.
| 2 | Over | OverRangeError. Set when reading any addresses in the range <code>0x0080 0000</code> to <code>0x03EF FFFF</code>, even when an RDRAM bank has been mapped there.
| 1 | NAck | UnexpectedNAck. Set when RI sees an unexpected NAak (probably because bank status bits were wrong).
| 1 | Ack Error? | ?
| 0 | NACK Error | Set when accessing an address with no mapped RDRAM device. This bit is set sometime during IPL3 init, presumably when probing memory size.
| 0 | Ack | MissingAck. Set when RI doesn't see an Ack (like when no RDRAM device was mapped to that address). <br>
This bit is set sometime during IPL3 init, presumably due to probing memory size.
}}
}}


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{{#invoke:Register table|foot}}
{{#invoke:Register table|foot}}
{{#invoke:Register table|definitions
{{#invoke:Register table|definitions
| 31-16 | ? |
| 31-16 | Undefined | Undefined
| 15-8 | BankDirtyBits | One per bank. Set when a bank has been written since last refresh cycle
| 15-8 | BankDirtyBits[7:0] | One per bank. Set when the currently open row has been written.
| 7-0 | BankValidBits | One per bank. Set when a bank has been read since last refresh cycle
| 7-0 | BankValidBits[7:0] | One per bank. Set when a row is opened. Presumably only cleared by a refresh cycle.
}}
}}


Writing any value this register will clear any tracking bits.
Writing any value this register will clear any tracking bits. This causes RI to become out-of-sync with RDRAM and will result in errors.


= Memory addressing =
= Memory addressing =
Retrieved from "https://n64brew.dev/wiki/RDRAM_Interface"