RDRAM

Rambus DRAM (or RDRAM) is a type of synchronous dynamic random-access memory (SDRAM) designed by Rambus. The N64 motherboard came with either one or two chips, totaling 4 MB (4,194,304 bytes) of general purpose storage which can be accessed by the CPU. The optional Expansion Pak could increase this by an additional 4 MB and is required for some games to run.

Each byte of RDRAM actually has an extra bit, which can only be used by the RDP and VI core. This 9th bit is used to store things like anti-aliasing coverage in the color buffer. On systems other than the N64, the 9th bit would likely be used for parity checks.

RDRAM system overview

A typical RDRAM system is composed of 3 main elements :

• a controller, which act as the channel master. This part reside in the RI.
• the channel, which is a synchronous bus connecting the RDRAM devices together
• RDRAM modules, each containing memory banks, and some registers.

TODO: insert a small diagram

Interface Pinouts

Pin	Signal	RSL	I/O	Description
1	VDD		-	+3.3V power supply.
2	GND		-	Circuit ground.
3	DQ8	Y	I/O	Signal line (bit 8) for REQ, DIN, and DOUT packets.
4	GND		-	Circuit ground.
5	DQ7	Y	I/O	Signal line (bit 7) for REQ, DIN, and DOUT packets.
6	NC*		-	Not connected.
7	ADDRESS	Y	I	Signal line for COL packets with column addresses.
8	VDD		-	+3.3V power supply.
9	DQ6	Y	I/O	Signal line (bit 6) for REQ, DIN, and DOUT packets.
10	GND		-	Circuit ground.
11	DQ5	Y	I/O	Signal line (bit 5) for REQ, DIN, and DOUT packets.
12	VDDA		-	Separate analog power supply for clock generation in the RDRAM.
13	RXCLK	Y	I	Receive clock. All input packets are aligned to this clock.
14	GNDA		-	Separate analog ground for clock generation in the RDRAM.
15	TXCLK	Y	I	Transmit clock. DOUT packets are aligned with this clock.
16	VDD		-	+3.3V power supply.
17	DQ4	Y	I/O	Signal line (bit 4) for REQ, DIN, and DOUT packets.
18	GND		-	Circuit ground.
19	COMMAND	Y	I	Signal line for REQ, RSTRB, RTERM, WSTRB, WTERM, RESET, and CKE packets.
20	SIN		I	Initialization daisy chain input. CMOS levels. See section on initialization for more details.
21	VREF		I	Logic threshold reference voltage for RSL signals.
22	SOUT		O	Initialization daisy chain output. CMOS levels. See section on initialization for more details.
23	DQ3	Y	I/O	Signal line (bit 3) for REQ, DIN, and DOUT packets.
24	GND		-	Circuit ground.
25	DQ2	Y	I/O	Signal line (bit 2) for REQ, DIN, and DOUT packets.
26	NC		-	Not connected.
27	DQ1	Y	I/O	Signal line (bit 1) for REQ, DIN, and DOUT packets.
28	GND		-	Circuit ground.
29	DQ0	Y	I/O	Signal line (bit 0) for REQ, DIN, and DOUT packets.
30	NC		-	Not connected.
31	GND		-	Circuit ground.
32	VDD		-	+3.3V power supply.

RSL stands for Rambus Signaling Levels, a low-voltage-swing, active-low signaling technology.

Source: Rambus concurrent RDRAM datasheet [1]

Known RDRAM Console Chip Configurations

N64 Version	Board revision	Region	Number of RDRAM Chips	Size per Chip(Mbytes)	Size per Chip(Mbytes)
NUS-001	(P) - 01	PAL	2	2.25Megabytes	18Mbit
NUS-002	(P) - 02	PAL	1	4.5Megabytes	36Mbits

Known RDRAM Expansion Pak Configurations

Expansion Pak Type	Number of RDRAM Chips	Size per Chip(Mbytes)	Size per Chip(Mbytes)
Transfer Pak (Nintendo Official)	0	0	0
Expantion Pak (Nintendo Official)	1	4.5Megabytes	36Mbits

There are 3rd party Expansion Paks that have 2 chips which are both 2.25Megabytes each. Please provide images and makers here.

Initialization Sequence

This Initialization sequence is based on the 6102 CIC boot code

File:Cncrntug.pdf

Expansion Pak Detection

The typical way to detect how much memory is installed is to probe it.

LibUltra provides a function called osGetMemSize() which does this. The function writes different values at addresses in the uncached KSEG1 direct map, starting at 0xa0300000, and then reads the values back. It tries successively higher addresses, jumping by 1 MB each time through the loop. It returns the amount of RAM which it successfully wrote and read back, rounded up to a number of megabytes.

// C-like pseudocode...
u32 osGetMemSize(void) {
    // Base address of RAM in kseg1.
    uintptr_t base_addr = 0xa0000000;
    uintptr_t megabyte = 1024 * 1024;
    // Address where we will probe.
    uintptr_t cur_addr = kseg1 + 3 * megabyte;
    while (true) {
        write to addr;
        read from addr;
        if (value read != value written) {
            break;
        }
        cur_addr += megabyte;
    }
    return cur_addr - base_addr;
}

During boot, IPL3 will also write the amount of RAM available, in bytes, to a 32-bit value at address 0x80000318 (or 0x800003f0, for CIC 6105). On retail hardware, this should always have the value 0x400000 (no expansion pak) or 0x800000 (expansion pak). When using LibUltra, this variable can be accessed with the name osMemSize, which is defined like this:

extern u32 osMemSize;

LibDragon provides the the amount of memory installed with the get_memory_size() function.

Drawbacks and Limitations

Opinion

RDRAM has excellent data transfer speed for the era (bytes per second) but due to the protocol used and serial interface, memory transactions were somewhat slower (how much time it took from starting a read/write operation to finishing it). In practice, you may find that the available memory bandwidth is a limiting factor for the performance of your game. See: How fast was Rambus compared to regular EDO RAM?

— Vanadium

Datasheets

Several manufacturers produced compatible "Base RDRAM" modules such as :

• LG GM73V1892AH16L
• NEC uPD488170L
• OKI MSM5718B70
• Toshiba TC59R1809VK TC59R1809HK

Reference : [2]