Peripheral Interface: Difference between revisions

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==== Internal process ====
The transfer is split in blocks of maximum 128 bytes each one. Within each block, the PI first fills the internal buffer fetching data from the PI bus, and then write backs the buffer contents to RDRAM. This can be observed by monitoring PI_DRAM_ADDR and PI_CART_ADDR: during the transfer, it can be first seen PI_CART_ADDR moving forward, and then PI_DRAM_ADDR catching up with a leap (writing to RDRAM is much faster than reading PI).
 
then PI_DRAM_ADDR catching up with a leap (writing to RDRAM is much faster than reading PI).
 
In general for all blocks of the transfer (excluding the first one, see below), the logic appears to be as follows: