Peripheral Interface: Difference between revisions

m
(Updated length register behaviors)
m (→‎0x0460 00n0 - PI_BSD_DOMn_RLS: Fixed bit range typo)
Line 310:
{{#invoke:Register table|definitions
| 31-2 | Undefined | Initialized to <code>0</code>
| 1-0 | RLS[71:0] | The "ReLeaSe" value is the number of RCP cycles, minus one, that the /RD or /WR signals are held high between each 16-bits of data
}}
'''Extra Details:'''