Peripheral Interface: Difference between revisions

Fixed directionality for DMA reads/writes
(Revised wording and formatting)
(Fixed directionality for DMA reads/writes)
Line 139:
{{#invoke:Register table|definitions
| 31-24 | Undefined | Initialized to <code>0</code>
| 23-0 | RD_LEN[23:0] | Number of bytes, minus one, to be transferred from cartRDRAM, to the PI bus; bit-0 should be 1 or else unexpected behavior might occur (documentation/research needed)
}}
 
Line 164:
{{#invoke:Register table|definitions
| 31-24 | Undefined | Initialized to <code>0</code>
| 23-0 | WR_LEN[23:0] | Number of bytes, minus one, to be transferred tofrom cartthe PI bus, into RDRAM; bit-0 should be 1 or else unexpected behavior might occur (documentation/research needed)
}}