Peripheral Interface: Difference between revisions
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→PI Interface Process
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=== PI Interface Process ===
====== Address output: ======
[[File:Rom address output.png|border|left|frameless|984x984px|Rom Address Output]]
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====== Data Read: ======▼
▲Data Read:
[[File:Rom Read Data.png|alt=Rom Read Data|border|left|frameless|1003x1003px|Rom Read Data]]
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====== Constant Read: ======▼
▲Constant Read:
[[File:Constant ROM Access.png|border|left|frameless|1522x1522px|Constant ROM Access]]
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===
An aligned DMA transfer is when the PI_DRAM_ADDR_REG is set to a 64bit (8byte) aligned address. The PI_CART_ADDR_REG can be any 16bit (2Byte) value as will transfer from that offset to RDRAM (more to come)
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