Peripheral Interface: Difference between revisions
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(Updated length register behaviors) |
m (→0x0460 00n0 - PI_BSD_DOMn_RLS: Fixed bit range typo) |
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{{#invoke:Register table|definitions |
{{#invoke:Register table|definitions |
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| 31-2 | Undefined | Initialized to <code>0</code> |
| 31-2 | Undefined | Initialized to <code>0</code> |
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| 1-0 | RLS[ |
| 1-0 | RLS[1:0] | The "ReLeaSe" value is the number of RCP cycles, minus one, that the /RD or /WR signals are held high between each 16-bits of data |
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}} |
}} |
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'''Extra Details:''' |
'''Extra Details:''' |