Peripheral Interface: Difference between revisions
Timing counter sizes
(Added more info about PI domains.) |
Mazamars312 (talk | contribs) (Timing counter sizes) |
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-n = Default value n at power on
[x:y] = Specifies bits x to y, inclusively</pre>
==== <span style="display:none;">0x0460 0000 - PI_DRAM_ADDR
----
{{#invoke:Register table|head|550px|PI_DRAM_ADDR <code>0x0460 0000</code>}}
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32'h0460_002C
|R/W
|This is a
Default value set by games is (
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|PI_BSD_DOM1_RLS_REG
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32'h0460_0030
|R/W
|This is a
This counter runs after the PI_BSD_DOMX_RLS_REG counter and increases by 1 every clock cycle of the RCP (62.5mhz). Once the counter reaches this value, the process will go to idle or back to PI_BSD_DOMX_LAT_REG.
Default value set by games is (
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