Peripheral Interface: Difference between revisions
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| Line 111: | Line 111: | ||
| RW-0 || RW-0 || RW-0 || RW-0 || RW-0 || RW-0 || RW-0 || R-0 |
| RW-0 || RW-0 || RW-0 || RW-0 || RW-0 || RW-0 || RW-0 || R-0 |
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| colspan="8" | CART_ADDR[7: |
| colspan="8" | CART_ADDR[7:1] || 0 |
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{{#invoke:Register table|foot}} |
{{#invoke:Register table|foot}} |
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{{#invoke:Register table|definitions |
{{#invoke:Register table|definitions |
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| 31- |
| 31-1 | CART_ADDR[31:1] | Base address of the PI bus (e.g. cartridge) for PI DMAs; notice that bit 0 cannot be written and is fixed to 0. |
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}} |
}} |
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