MIPS Interface: Difference between revisions
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(Minor formatting fixes) |
(Fix order of Set/Clear) |
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| Line 59: | Line 59: | ||
| U-0 || U-0 || W-0 || W-0 || W-0 || W-0 || RW-0 || RW-0 |
| U-0 || U-0 || W-0 || W-0 || W-0 || W-0 || RW-0 || RW-0 |
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| — || — || Set Upper || Clear Upper || ClearDP || |
| — || — || Set Upper || Clear Upper || ClearDP || Set Ebus || Clear Ebus || Set Repeat |
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{{#invoke:Register table|row|7:0}} |
{{#invoke:Register table|row|7:0}} |
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| W-0 || RW-0 || RW-0 || RW-0 || RW-0 || U-0 || RW-0 || RW-0 |
| W-0 || RW-0 || RW-0 || RW-0 || RW-0 || U-0 || RW-0 || RW-0 |
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| Clear Repeat || colspan="7" | RepeatCount[6:0] |
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{{#invoke:Register table|foot}} |
{{#invoke:Register table|foot}} |
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{{#invoke:Register table|definitions |
{{#invoke:Register table|definitions |
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| 13 | SetUpper | Set Ebus mode. |
| 13 | SetUpper | Set Ebus mode. |
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| 12 | ClearUpper | Set Ebus mode. |
| 12 | ClearUpper | Set Ebus mode. |
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| 11 | ClearDP | Clear the DP |
| 11 | ClearDP | Clear the DP Interrupt. |
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| 10 | |
| 10 | SetEBus | Set Ebus mode. |
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| 9 | |
| 9 | ClearEBus | Clear Ebus mode. |
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| 8 | |
| 8 | SetRepeat | Set repeat mode. Automatically clears after a single write. |
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| 7 | |
| 7 | ClearRepeat | Clear repeat mode. |
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| 6-0 | RepeatCount[6:0] | Number of bytes (minus 1) to write in repeat mode |
| 6-0 | RepeatCount[6:0] | Number of bytes (minus 1) to write in repeat mode |
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}} |
}} |
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