MIPS Interface: Difference between revisions
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(Added bit details for MI_INTERRUPT) |
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{{#invoke:Register table|definitions |
{{#invoke:Register table|definitions |
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| 31-6 | Undefined | Initialized to <code>0</code> |
| 31-6 | Undefined | Initialized to <code>0</code> |
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| 5 | DP | Interrupt flag |
| 5 | DP | Interrupt flag - Set when a full sync completes |
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| 4 | PI | Interrupt flag |
| 4 | PI | Interrupt flag - Set when a PI DMA finishes |
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| 3 | VI | Interrupt flag |
| 3 | VI | Interrupt flag - Set when <code>VI_V_CURRENT {{=}}{{=}} VI_V_INTR</code> |
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| 2 | AI | Interrupt flag |
| 2 | AI | Interrupt flag - Set when no more samples remain in an audio stream |
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| 1 | SI | Interrupt flag |
| 1 | SI | Interrupt flag - Set when a SI DMA to/from PIF RAM finishes |
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| 0 | SP | Interrupt flag |
| 0 | SP | Interrupt flag |
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