EverDrive-64 v3: Difference between revisions

describe more registers
(add some registers' descriptions)
(describe more registers)
Line 37:
| 0x08040014 || REG_DMA_CFG || W || Invoke SD/USB DMA
|-
| 0x08040018 || REG_SPI || R/W || SPI (SD card) DAT/CMD (write invoke CLK)
|-
| 0x0804001C || REG_SPI_CFG || W || SPI (SD card) configurations
|-
| 0x08040020 || REG_KEY || W || Enable or disable ED64 registers
Line 120:
=== 0x08040008 (REG_DMA_LEN) ===
Write only
{| class="wikitable"
 
!bit from lsb
Next SD/USB DMA transfers (this + 1) * 512 bytes.
!description
 
|-
ex. 0 = 0x200 bytes, 1 = 0x400 bytes, 2 = 0x600 bytes.
|15-0
|Next SD/USB DMA transfer size in 512 bytes step, minus 1.
ex. 0 = 0x200 bytes, 1 = 0x400 bytes, 2 = 0x600 bytes...
|}
 
=== 0x0804000C (REG_DMA_RAM_ADDR) ===
Write only
{| class="wikitable"
!bit from lsb
!description
|-
|15-0
|Next SD/DMA DMA transfer size in 2048 bytes step.
ex. 0 = 0x00000000, 1 = 0x00000800, 2 = 0x00001000...
 
This is in ED64 ROM address space, ex. 0xB0000000 on CPU = 0x10000000 on PI = 0x00000000 on ED64 ROM.
Next SD/DMA DMA transfers from this * 2048 bytes.
|}
 
ex. 0 = 0x00000000, 1 = 0x00000800, 2 = 0x00001000.
 
This is ED64 ROM address space, ex. 0xB0000000 on CPU = 0x10000000 on PI = 0x00000000 on ED64 ROM.
 
=== 0x08040010 (REG_MSG) ===
Line 185 ⟶ 193:
|-
|3
|Read or write (on writing REG_SPI): 0=write 1=read
|-
|2
Line 196 ⟶ 204:
=== 0x08040020 (REG_KEY) ===
Write only
{| class="wikitable"
 
!bit from lsb
TBA
!description
|-
|15-0
|Enable or disable ED64 registers: 0=disable, 0x1234=enable
|}
Note that you should dummy-read REG_CFG before writing to REG_KEY, or it may be ignored (glitch).
 
=== 0x08040024 (REG_SAV_CFG) ===
Write only
{| class="wikitable"
 
!bit from lsb
TBA
!description
 
|-
|15
|always 1?
|-
|7
|unknown but 1?
|-
|3
|SRAM size: 0=32KiB 1=128KiB
|-
|2
|EEPROM size: 0=4kbit 1=16kbit
|-
|1
|SRAM ON: 1=SRAM
|-
|0
|EEPROM ON: 1=EEPROM
|}
But this register should be treated as a value not bitfields (like REG_DMA_CFG)
{| class="wikitable"
!value
!description
|-
|0x8080
|Save is disabled
|-
|0x8082
|32KiB SRAM enabled
|-
|0x808A
|128KiB SRAM enabled
|-
|0x8081
|4kbit EEPROM enabled
|-
|0x8085
|16kbit EEPROM enabled
|-
|0x8088
|128KiB Flash enabled (!?)
|}
=== 0x08040028 (REG_SEC) ===
TBA
Line 209 ⟶ 265:
=== 0x0804002C (REG_VER) ===
Read only
{| class="wikitable"
 
!bit from lsb
TBA
!description
|-
|15-8
|HW major version
|-
|7-0
|HW minor version
|}
ex. 0x0304 for HW v3.04
 
=== 0x08040030 (I2C/RTC) ===
Read/Write
{| class="wikitable"
!bit from lsb
!description
|-
|2
|CLK
|-
|0
|DAT
|}
You must set DAT=1 before read, or you'll get always DAT=0 (because of I2C's open-drain).
 
DS1337 (RTC) at address 0x58.
TBA
 
=== 0x08040040 (REG_CFG_CNT) ===
Line 225 ⟶ 301:
=== 0x08040048 (REG_MAX_MSG) ===
Read/Write
{| class="wikitable"
 
!bit from lsb
TBA
!description
 
|-
|14
|?
|-
|13
|1=SDHC
|-
|12
|1=SD card initialized
|-
|11-10
|tvtype (value that IPL3 sets)
|-
|9
|1=tvtype in REG_MAX_MSG is set
|-
|8
|1=FPGA configured
|}
=== 0x0804004C (REG_CRC) ===
TBA
24

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