Video Interface: Difference between revisions

m (→‎0x0440 0018 - VI_V_SYNC: MPAL V_SYNC timing same as NTSC)
 
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{{#invoke:Register table|definitions
| 31-17 | Undefined | Initialized to <code>0</code>
| 16 | DEDITHER_FILTER_ENABLEDEDITHER_ENABLE | Dedither Enable bit <br>1 {{=}} DeditherDedithering (aka "dither filter") is enabled; (normally used for 16-bit framebuffers; thisto maytry causeto verticalreconstruct bandinga if anti32-aliasingbit isimage. disabledNotice [https://github.com/DragonMindedthat this filter only works correctly when <code>AA_MODE</libdragon/issues/159code> asis seenset here])to <code>00</code>. <br>0 {{=}} Dedither filterDedithering is disabled (normally used for 32-bit color)
| 15-12 | PIXEL_ADVANCE[3:0] | Use <code>0b0011</code> for most effective behavior on N64. On the iQue Player a pixel advance of <code>0b0011</code> creates video glitches, applications typically use <code>0b0001</code> instead.
| 11 | KILL_WE | Diagnostics only, possibly kills VI DMA writes to line buffers making them safe to access via the test registers.
| 10 | Undefined | Initialized to <code>0</code>
| 9-8 | AA_MODE[1:0] | Anti-Alias Mode <br>11 {{=}} AA and resampling disabled, replicate pixels without interpolation <br>10 {{=}} AA disabled, resampling enabled, and operate as if everything is covered <br>01 {{=}} AA enabled, resampling enabled, and only fetches extra lines as needed <br>00 {{=}} AA enabled, resampling enabled, and will always fetch extra lines (required if <code>DEDITHER_ENABLE</code> is 1).
| 7 | TEST_MODE | Diagnostics only, enables usage of the line buffer test registers VI_TEST_ADDR/VI_STAGED_DATA. KILL_WE should also be set to avoid access races between the VI and CPU.
| 7 | TEST_MODE | Diagnostics only
| 6 | SERRATE | Normally enabledRequired if interlacing, otherwisepermitted when progressive, often disabled <br>1 {{=}} Enabled <br>0 {{=}} Disabled
| 5 | VBUS_CLOCK_ENABLE | Vbus Clock Enable <br>1 {{=}} Enabled <br>0 {{=}} Disabled <br>{{spaces|4}}'''''Warning: Always leave disabled!''' Setting this bit enables a second driver, which will output on the same pin as another driver, possibly causing physical console damage.''
| 4 | DIVOT_ENABLE | Fixes minor artifacts left over from anti-aliasing (more details below) <br>1 {{=}} Enabled (usually used if AA is enabled) <br>0 {{=}} Disabled
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}}
'''Extra Details:'''
: '''DEDITHER_FILTER_ENABLEDEDITHER_ENABLE'''
:: When enabled, the VI will run a de-dithering algorithm, trying to reverse the effects of dithering on each pixel to produce an higher resolution color information on the analog output. This is useful when the framebuffer is 16-bit and has been dithered while drawing. To do so, VI looks at the 8 neighbors around each pixel and perform an error correction; the algorithm used works best with images that have been dithered using the "Magic Square" dithering algorithm (that the RDP can be configured to do). The VI does de-dedithering only on pixels where coverage is full; on pixels with partial coverage, the standard AA algorithm is performed. '''NOTE''': this filter requires <code>AA_MODE</code> to be set to <code>00</code>, otherwise the image is corrupted by vertical streaks ([https://github.com/DragonMinded/libdragon/issues/159 as seen here]).
: '''DIVOT_ENABLE'''
:: When enabled, this feature fixes artifacts that the anti-aliasing algorithm leaves behind. The median color of three neighboring pixels, from any pixels on or next to silhouette edges, is selected to be displayed in place of the center pixel. Effectively removing any one pixel divots that can be seen in some fractal-based terrains. The anti-aliasing function encounters issues when multiple fragments occur on a single pixel. Since this filter is only used on edges, and not the surface of an object, texture details will not be affected. Be aware that bad quality effects can occur when the ''decal line'' rendering mode is used in conjunction with this filter, as the rendering mode generates edges that the filter can detect.
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{{#invoke:Register table|definitions
| 31-10 | Undefined | Initialized to <code>0</code>
| 9-0 | V_SYNC[9:0] | One less than the total number of visible and non-visible half-lines. This should match either NTSC=/MPAL (non-interlaced: <code>525</code>, interlaced: <code>524</code>) or PAL (non-interlaced: <code>625</code>, interlaced: <code>624</code>)
}}
 
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| 20-16 | LEAP[4:0] | 5-bit leap pattern used only for PAL. Should always use standard value of <code>0x15</code>
| 15-12 | Undefined | Initialized to <code>0</code>
| 11-0 | H_SYNC[11:0] | One less than the total length of a scanline in 1/4 pixel units. Should always use standard values: NTSC (<code>3093</code>), PAL (<code>3177</code>), or MPAL (<code>3090</code>)<br>Default value of <code>2047</code> (</code>0x7FF</code>)
}}
 
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:: MPAL has 227.25 chroma periods per scanline. MPAL N64 has 13.6 VI clocks per chroma period. 227.25 x 13.6 = 3090.6
:: PAL (European) has 283.7516 chroma periods per scanline. PAL N64 has 11.2 clocks per chroma period. 283.75 x 11.2 = 3178
: H_SYNC is also used by the RDRAM Interface for refresh timings. As the default is notably shorter than regular video modes, there will be a noticeable impact to memory bandwidth until H_SYNC is configured to a valid video mode.
 
==== <span style="display:none;">0x0440 0020 - VI_H_SYNC_LEAP ====
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}}
===== Errata =====
* If [[#0x0440_0000_-_VI_CTRL|AA_MODE]] = 11 (resampling disabled), [[#0x0440_0000_-_VI_CTRL|TYPE]] = 10 (16-bit), and X_SCALE is 0x200 or lower, and H_START is less than 128, the VI generates invalid output, consisting of the first 64 pixels from the framebuffer from the current line, then 64 pixels of garbage, and these two repeat for the rest of each scanline
* If X_SCALE is higher than 0x800 (32bpp) or 0xE00 (16bpp), the scaler renders incorrect pixels, with specifics depending on depth. This appears to be due to exceeding the number of VI fetches allocated per scanline.
 
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{{#invoke:Register table|definitions
| 31-7 | Undefined | Initialized to <code>0</code>
| 6-0 | TEST_ADDR[6:0] | DiagnosticsSets only,the usageline unknownbuffer word address at which VI_STAGED_DATA will read/write data.
}}
==== <span style="display:none;">0x0440 003C - VI_STAGED_DATA ====
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{{#invoke:Register table|foot}}
{{#invoke:Register table|definitions
| 31-0 | STAGED_DATA[31:0] | Reads from this register returns 32 bits of line buffer data at the address specified in VI_TEST_ADDR. Writes to this register emplace 32 bits of data into the line buffer at the address specified in VI_TEST_ADDR. Usage requires TEST_MODE to be set in VI_CTRL.
| 31-0 | STAGED_DATA[31:0] | Diagnostics only, usage unknown
}}