Reality Signal Processor: Difference between revisions
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|Instruction Size |
|Instruction Size |
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|32bit (1 Word) |
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|Duel Instruction |
|Duel Instruction |
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|IMEM Data Path |
|IMEM Data Path |
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|64bit (This allows a duel instruction to happen) This can only be double word aligned for reads |
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|Scaler Register Size |
|Scaler Register Size |
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|Vector Register Size |
|Vector Register Size |
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|32 entries of |
|32 entries of 128bit is size (8bit to 128bit Mask Writable File) |
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|DMEM Scaler Data Path |
|DMEM Scaler Data Path |
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|Up to |
|Up to 32bit Loads and Stores |
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|DMEM Vector Data Path |
|DMEM Vector Data Path |
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|Up to |
|Up to 128bit Loads and Stores |
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|Scaler ALU Size |
|Scaler ALU Size |
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|32bit in side only |
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|Vector ALU Size |
|Vector ALU Size |
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|8x 16bit vector ALU pipelines ( |
|8x 16bit vector ALU pipelines (48bit Final Accumulator) |
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[[Category:Motherboard components]] |
[[Category:Motherboard components]] |
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Revision as of 05:09, 11 December 2021
The Reality Signal Processor, or RSP, is the portion of the RCP responsible for matrix math, lighting calculations, clipping, shading, and other highly parallel graphics tasks as well as audio processing. The RSP can be programmed in custom microcode to handle specific tasks, though most games leverage one of several stock microcodes made available by Nintendo.
https://www.retroreversing.com/n64rsp
Specs
| Discription | |
|---|---|
| CPU Type | Cut down version of the MIPS4000 CPU |
| Clock Speed | 62.5mhz |
| Instruction Size | 32bit (1 Word) |
| Duel Instruction | Yes (one scaler and one vector opcode at once) |
| Pipeline Stages | 5 stage pipeline for both the Scaler and Vector Pipelines
IF, RD and WB stages are shared between the two pipelines |
| IMEM Data Path | 64bit (This allows a duel instruction to happen) This can only be double word aligned for reads |
| Scaler Register Size | 32 entries of 32bit in size (Word Writable) |
| Vector Register Size | 32 entries of 128bit is size (8bit to 128bit Mask Writable File) |
| DMEM Scaler Data Path | Up to 32bit Loads and Stores |
| DMEM Vector Data Path | Up to 128bit Loads and Stores |
| Scaler ALU Size | 32bit in side only |
| Vector ALU Size | 8x 16bit vector ALU pipelines (48bit Final Accumulator) |