Reality Signal Processor/CPU Core: Difference between revisions

Line 93:
|-
|2
|<code>e(0q)</code>
|<code>[0q]</code>
|0,0,2,2,4,4,6,6
|Broadcast 4 of 8 lanes
|-
|3
|<code>e(1q)</code>
|<code>[1q]</code>
|1,1,3,3,5,5,7,7
|Broadcast 4 of 8 lanes
|-
|4
|<code>e(0h)</code>
|<code>[0h]</code>
|0,0,0,0,4,4,4,4
|Broadcast 2 of 8 lanes
|-
|5
|<code>e(1h)</code>
|<code>[1h]</code>
|1,1,1,1,5,5,5,5
|Broadcast 2 of 8 lanes
|-
|6
|<code>e(2h)</code>
|<code>[2h]</code>
|2,2,2,2,6,6,6,6
|Broadcast 2 of 8 lanes
|-
|7
|<code>e(3h)</code>
|<code>[3h]</code>
|3,3,3,3,7,7,7,7
|Broadcast 2 of 8 lanes
|-
|8
|<code>e(0)</code>
|<code>[0]</code>
|0,0,0,0,0,0,0,0
|Broadcast single lane
|-
|9
|<code>e(1)</code>
|<code>[1]</code>
|1,1,1,1,1,1,1,1
|Broadcast single lane
|-
|10
|<code>e(2)</code>
|<code>[2]</code>
|2,2,2,2,2,2,2,2
|Broadcast single lane
|-
|11
|<code>e(3)</code>
|<code>[3]</code>
|3,3,3,3,3,3,3,3
|Broadcast single lane
|-
|12
|<code>e(4)</code>
|<code>[4]</code>
|4,4,4,4,4,4,4,4
|Broadcast single lane
|-
|13
|<code>e(5)</code>
|<code>[5]</code>
|5,5,5,5,5,5,5,5
|Broadcast single lane
|-
|14
|<code>e(6)</code>
|<code>[6]</code>
|6,6,6,6,6,6,6,6
|Broadcast single lane
|-
|15
|<code>e(7)</code>
|<code>[7]</code>
|7,7,7,7,7,7,7,7
|Broadcast single lane