Reality Display Processor/Interface: Difference between revisions
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| 23-0 | PIPE_BUSY[23:0] | 24-bit counter of RDP pipeline activation time at RCP frequency |
| 23-0 | PIPE_BUSY[23:0] | 24-bit counter of RDP pipeline activation time at RCP frequency |
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'''Extra Details:''' |
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:'''PIPE_BUSY''' This register accesses a read-only 24-bit clock that counts up only in the intervals of time between the first command being received via RDP DMA, and the subsequent SYNC_FULL command. Basically, this counter shows the RDP activity "gross time", because it keeps counting even if the RDP has nothing to do, until SYNC_FULL is received. |
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====<span style="display:none;">0x0410 001C (c15) - DPC_TMEM_BUSY ==== |
====<span style="display:none;">0x0410 001C (c15) - DPC_TMEM_BUSY ==== |
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