RDRAM Interface: Difference between revisions

No idea what DmaLatencyOverlap does, but we do know it's 4 bits.
(More RI_ERROR research. Fix formatting errors.)
(No idea what DmaLatencyOverlap does, but we do know it's 4 bits.)
Line 174:
| — || — || — || — || — || — || — || —
{{#invoke:Register table|row|7:0}}
| U-? || U-? || U-? || U-? || URW-? || URW-? || URW-? || URW-?
|-
| — || — || — || — || colspan="4" || — || — || DmaLatencyOverlap[4:0]
{{#invoke:Register table|foot}}
{{#invoke:Register table|definitions
| 31-04 | TBDUndefined | To be determinedUndefined
| 3-0 | DmaLatencyOverlap[4:0] | ?
}}
 
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