RDRAM Interface: Difference between revisions
More RI_ERROR research. Fix formatting errors.
(Fill in RI_ERROR and RI_BANK_STATUS) |
(More RI_ERROR research. Fix formatting errors.) |
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Line 200:
| U-? || U-? || U-? || U-? || U-? || R-? || R-? || R-?
|-
| — || — || — || — || — ||
{{#invoke:Register table|foot}}
{{#invoke:Register table|definitions
| 31-3 | Undefined | Undefined
| 2 |
| 1 | NAck | UnexpectedNAck. Set when RI sees an unexpected NAak (probably because bank status bits were wrong).
| 0 |
This bit is set sometime during IPL3 init, presumably due to probing memory size.
}}
Line 232 ⟶ 233:
{{#invoke:Register table|foot}}
{{#invoke:Register table|definitions
| 31-16 |
| 15-8 | BankDirtyBits[7:0] | One per bank. Set when
| 7-0 | BankValidBits[7:0] | One per bank. Set when a
}}
Writing any value this register will clear any tracking bits. This causes RI to become out-of-sync with RDRAM and will result in errors.
= Memory addressing =
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