RDRAM Interface: Difference between revisions

(Add RI_SELECT description)
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| 31-8 | Undefined | Undefined
| 7-4 | TSEL[3:0] | Configure transmit signals timings. Very likely related to RAC signals B{C,D,E}Sel. Usually set to <code>0x1</code>.
| 3-0 | RSEL[3:0] | Configure receive signals timings. Very likely related to RAC signalssignal R{C,D}SelRDSel. Usually set to <code>0x4</code>.
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