Memory map: Difference between revisions

* All writes are performed '''asynchronously''' by the SI. Making a write in this area will in fact just cause the SI to latch the value internally, and release the VR4300 immediately. The write will then happen in background. The status of the ongoing write will be reflected by the SI "I/O busy" status bit, which will be set to 1 until the write is finalized. While a write is ongoing, further writes are ignored, and reads (from any address) returnare theautomatically 32-bitdelayed valueuntil thatthe iswrite beingis writtenfinished. For further information on this, please check the [[SI|SI page]]. Notice that the SI doesn't know that a certain range of addresses are mapped to ROM and thus read-only, so even writes in the ROM area follow this pattern; they are just ignored by the PIF itself.