Memory map: Difference between revisions

The accesses in this area are handled by RCP itself without going to an external bus, and are dispatched internally to the correct subsystem. Access to a register might optionally stall the VR4300 if the subsystem is designed to do so (eg: to perform a long blocking operation on write), but in general for standard registers, they are immediatequite fast and take only 15-6 PClock cyclecycles (MI regs are a bit faster and take about 2 cycles).