MIPS Interface: Difference between revisions

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(Document MI_BB_SECURE_EXCEPTION to test iQue Player register documentation layout)
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: The bootrom writes 0 to bit 1 just before jumping to SK; it's also unknown what effect this has.
: Reading this register from non-secure mode, i.e. as a game or application, causes a secure trap (execution jumps to the beginning of the secure kernel and the console enters secure mode) with the Application bit set in the register. Presumably, writing the register has the same effect, but this hasn't been checked.
: This mechanism is how SKCs (secure kernel calls) are implemented; the application sets up the required CPU registers for the call, then reads from `MI_BB_SECURE_EXCEPTION` to trigger the trap.
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