MIPS Interface: Difference between revisions
→0x0430 0008 - MI_INTERRUPT
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| 5 | DP | Interrupt flag - Set when the RDP finishes a full sync (requested explicitly via a SYNC_FULL command)
| 4 | PI | Interrupt flag - Set when a PI DMA transfer finishes
| 3 | VI | Interrupt flag - Set when the VI starts processing a specific half-line of the screen (<code>VI_V_CURRENT {{=}}{{=}} VI_V_INTR</code>). Usually, this is configured with
| 2 | AI | Interrupt flag - Set when the AI begins playing back a new audio buffer (to notify that the next one should be enqueued as soon as possible, to avoid crackings)
| 1 | SI | Interrupt flag - Set when a SI DMA to/from PIF RAM finishes
| 0 | SP | Interrupt flag - Set when the RSP executes a <code>BREAK</code> opcode while <code>SP_STATUS</code> has been configured with the
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