FAQ: Difference between revisions

Line 21:

For a long time, it was then believed that changing IPL3 would be enough to allow more chips to be mapped, assuming somebody built an expansion pak card with more chips in it. This is made difficult because IPL3 contents are verified through a hash and are part of the secure boot chain, so even if the hash can now be bruteforced with GPUs (and has been done a few times as proof of concepts), nobody has still written and released an open source IPL3 boot code to tinker with.

This notwithstanding, Mazamars312 has done investigations while implementing his N64-on-FPGA system, and has reported that, even if the chips are mapped to more than 8 MiB, it seems like the RCP chip itself (specifically, the RI subsystem which is in charge of converting VR4300 memory accesses to RAMBUS packets) is physically limited to managing requests in the first 8 MiB range. That is, even if the VR4300 generates accesses beyond 8 MiB, it refuses to generate the corresponding RAMBUS packets to talk to the chips that have been mapped there. In other words, the 8 MiB limit seems hardcoded in the RCP chip. If there is a way to unlock this limit via RI hardware registers, it is not known at this time.

This notwithstanding, Mazamars312 has done investigations while implementing his N64-on-FPGA system, and has reported that, even if the chips are mapped to more than 8 MiB, it seems like the RCP chip itself (specifically, the RI subsystem which is in charge of converting VR4300 memory accesses to RAMBUS packets) is physically limited to managing requests in the first 8 MiB range. That is, even if the VR4300 generates accesses beyond 8 MiB, the RI refuses to generate the corresponding RAMBUS packets to talk to the chips that have been mapped there. In other words, the 8 MiB limit seems hardcoded in the RCP chip. If there is a way to unlock this limit via RI hardware registers, it is not known at this time.

The tests Mazamars312 conducted are currently not reproducible with open source source and tools. Libdragon is planning to eventually release an open source IPL3, at which point it would be easier for others to experiment with the RDRAM initialization sequence.

@@ Line 21: / Line 21: @@
 For a long time, it was then believed that changing IPL3 would be enough to allow more chips to be mapped, assuming somebody built an expansion pak card with more chips in it. This is made difficult because IPL3 contents are verified through a hash and are part of the secure boot chain, so even if the hash can now be bruteforced with GPUs (and has been done a few times as proof of concepts), nobody has still written and released an open source IPL3 boot code to tinker with.
-This notwithstanding, Mazamars312 has done investigations while implementing his N64-on-FPGA system, and has reported that, even if the chips are mapped to more than 8 MiB, it seems like the RCP chip itself (specifically, the RI subsystem which is in charge of converting VR4300 memory accesses to RAMBUS packets) is physically limited to managing requests in the first 8 MiB range. That is, even if the VR4300 generates accesses beyond 8 MiB, it refuses to generate the corresponding RAMBUS packets to talk to the chips that have been mapped there. In other words, the 8 MiB limit seems hardcoded in the RCP chip. If there is a way to unlock this limit via RI hardware registers, it is not known at this time.
+This notwithstanding, Mazamars312 has done investigations while implementing his N64-on-FPGA system, and has reported that, even if the chips are mapped to more than 8 MiB, it seems like the RCP chip itself (specifically, the RI subsystem which is in charge of converting VR4300 memory accesses to RAMBUS packets) is physically limited to managing requests in the first 8 MiB range. That is, even if the VR4300 generates accesses beyond 8 MiB, the RI refuses to generate the corresponding RAMBUS packets to talk to the chips that have been mapped there. In other words, the 8 MiB limit seems hardcoded in the RCP chip. If there is a way to unlock this limit via RI hardware registers, it is not known at this time.
 The tests Mazamars312 conducted are currently not reproducible with open source source and tools. Libdragon is planning to eventually release an open source IPL3, at which point it would be easier for others to experiment with the RDRAM initialization sequence.

FAQ: Difference between revisions

Navigation menu

Search