EverDrive-64 v3: Difference between revisions
refine registers
(Reading Data from the Host: clarify that wait for RXF#=0 and DMA is not relevant) |
(refine registers) |
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Line 59:
| 0x0804003C || ? || ? || ?
|-
| 0x08040040 || REG_CFG_CNT ||
|-
| 0x08040044 || REG_CFG_DAT ||
|-
| 0x08040048 || MAX_MSG || R/W || Some configurations
Line 198:
=== 0x0804001C (REG_SPI_CFG) ===
Read/Write
{| class="wikitable"
!bit from lsb
Line 231:
=== 0x08040024 (REG_SAV_CFG) ===
Read/Write
{| class="wikitable"
!bit from lsb
Line 278:
|}
=== 0x08040028 (REG_SEC) ===
Write only?
=== 0x0804002C (REG_VER) ===
Line 311:
=== 0x08040040 (REG_CFG_CNT) ===
Read/Write
{| class="wikitable"
!bit from lsb
!description
|-
|3
|1=REG_CFG_DAT is transferring [R]
|-
|2
|1=FPGA is configuring? [R]
|-
|0
|0=unconfigure FPGA? [W]
|}
SDRAM must be disabled (REG_CFG & 1 must be zero).
=== 0x08040044 (REG_CFG_DAT) ===
Write only?
=== 0x08040048 (REG_MAX_MSG) ===
Read/Write on REG_CFG&1==0
{| class="wikitable"
!bit from lsb
Line 344 ⟶ 359:
=== 0x08040050 ===
Write only on REG_CFG&1==0 ?
TBA
=== 0x08040054 ===
Write only on REG_CFG&1==0 ?
TBA
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