COP1: Difference between revisions

690 bytes removed ,  8 months ago
 
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If multiple bits are set, the conditions are ORed together: For example, UEQ is considered true if the two operands are equal or unordered.
 
NotNote that inputs of qNAN as well as subnormals always signal Invalid Operation. Using all bit combinations, this gives the following instructions:
 
{| class="wikitable"
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! SignalOnSNAN (Bit 3) !! Smaller (Bit 2) || Equal (Bit 1) || Unordered (Bit 0) || Name || Result formula || Invalid Operation Condition
|-
| 0 || 0 || 0 || 0 || F || Result = false || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 0 || 0 || 1 || UN || Result = unordered(arg1, arg2) || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 0 || 1 || 0 || EQ || Result = arg1 == arg2 || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 0 || 1 || 1 || UEQ || Result = unordered(arg1, arg2) OR (arg1 == arg2) || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 1 || 0 || 0 || OLT || Result = arg1 < arg2 || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 1 || 0 || 1 || ULT || Result = unordered(arg1, arg2) OR (arg1 < arg2) || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 1 || 1 || 0 || OLE || Result = arg1 <= arg2 || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 0 || 1 || 1 || 1 || ULE || Result = unordered(arg1, arg2) OR (arg1 <= arg2) || IsQNAN(arg1) OR isQNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 0 || 0 || 0 || SF || Result = false || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 0 || 0 || 1 || NGLE || Result = unordered(arg1, arg2) || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 0 || 1 || 0 || SEQ || Result = arg1 == arg2 || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 0 || 1 || 1 || NGL || Result = unordered(arg1, arg2) OR (arg1 == arg2) || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 1 || 0 || 0 || LT || Result = arg1 < arg2 || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 1 || 0 || 1 || NGE || Result = unordered(arg1, arg2) OR (arg1 < arg2) || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 1 || 1 || 0 || LE || Result = arg1 <= arg2 || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|-
| 1 || 1 || 1 || 1 || NGT || Result = unordered(arg1, arg2) OR (arg1 <= arg2) || IsNAN(arg1) OR isNAN(arg2) OR isSubnormal(arg1) OR isSubnormal(arg2)
|}
 
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|+ Illegal register indexing in "Half Mode" (normally undocumented behavior - do not use)
|-
! 64 bitActual Register Index || MFC1/MTC1/LWC1/LDC1 || fs (32 bit) || fd (32 bit), ft (32 bit) or any 64 bit || fs (32 bit)
|-
| 0 || 1 (high 32 bits) / 0 (low 32 bits) || 0 (low 32 bits) || 0 or 1
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| 1 || unused || 1 (low 32 bits) || unused
|-
| 2 || 3 (high 32 bits) / 2 (low 32 bits) || 2 (low 32 bits) || 32 or 23
|-
| 3 || unused || 3 (low 32 bits) || unused
|-
| 4 || 5 (high 32 bits) / 4 (low 32 bits) || 4 (low 32 bits) || 54 or 45
|-
| 5 || unused || 5 (low 32 bits) || unused
14

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