Audio Interface: Difference between revisions
m (Updated category tag) |
No edit summary |
||
| Line 1: | Line 1: | ||
The Audio Interface (or '''AI''') is one of multiple I/O interfaces in the RCP, which is used to playback audio samples. It is a very simple audio processor: it fetches samples via DMA from RDRAM at a specified rate, and then outputs them. It performs absolutely no conversion on the samples: any audio processing functionality (decompression, mixing, etc.) must be performed by either the CPU or the RSP. |
|||
The Audio Interface is relatively simple, just define the sample rate and stream your samples. |
|||
Memory mapped registers are used to configure the AI and initiate DMA transfers. The base address for these registers is <code>0x0450 0000</code>, also known as AI_BASE. However, because all memory accesses in the CPU are made using virtual addresses, the following addresses must be offset appropriately. For non-cached reads/writes, add <code>0xA000 0000</code> to the address. As an example, to directly write to the AI_LENGTH register, use address <code>0xA450 0004</code>. |
|||
= Registers = |
|||
'''Table Notation:''' |
|||
<pre> |
|||
R = Readable bit |
|||
W = Writable bit |
|||
U = Undefined/Unused bit |
|||
-n = Default value n at power on |
|||
[x:y] = Specifies bits x to y, inclusively</pre> |
|||
==== <span style="display:none;">0x0450 0000 - PI_DRAM_ADDR ==== |
|||
---- |
|||
{{#invoke:Register table|head|550px|AI_DRAM_ADDR <code>0x0450 0000</code>}} |
|||
{{#invoke:Register table|row|31:24}} |
|||
| U-0 || U-0 || U-0 || U-0 || U-0 || U-0 || U-0 || U-0 |
|||
|- |
|||
| — || — || — || — || — || — || — || — |
|||
{{#invoke:Register table|row|23:16}} |
|||
| W-0 || W-0 || W-0 || W-0 || W-0 || W-0 || W-0 || W-0 |
|||
|- |
|||
| colspan="8" | DRAM_ADDR[23:16] |
|||
{{#invoke:Register table|row|15:8}} |
|||
| W-0 || W-0 || W-0 || W-0 || W-0 || W-0 || W-0 || W-0 |
|||
|- |
|||
| colspan="8" | DRAM_ADDR[15:8] |
|||
{{#invoke:Register table|row|7:0}} |
|||
| W-0 || W-0 || W-0 || W-0 || W-0 || W-0 || W-0 || W-0 |
|||
|- |
|||
| colspan="8" | DRAM_ADDR[7:0] |
|||
{{#invoke:Register table|foot}} |
|||
{{#invoke:Register table|definitions |
|||
| 23-0 | DRAM_ADDR[23:0] | RDRAM address used for next DMA transfer |
|||
}} |
|||
'''Extra Details:''' |
|||
: '''Read access''' |
|||
:: The register is write-only. Reading it returns a mirror of AI_LENGTH. |
|||
It gets more complicated if your samples are compressed, commonly with ADPCM. |
|||
[[Category:Motherboard components]] |
[[Category:Motherboard components]] |
||
Revision as of 15:11, 26 July 2022
The Audio Interface (or AI) is one of multiple I/O interfaces in the RCP, which is used to playback audio samples. It is a very simple audio processor: it fetches samples via DMA from RDRAM at a specified rate, and then outputs them. It performs absolutely no conversion on the samples: any audio processing functionality (decompression, mixing, etc.) must be performed by either the CPU or the RSP.
Memory mapped registers are used to configure the AI and initiate DMA transfers. The base address for these registers is 0x0450 0000, also known as AI_BASE. However, because all memory accesses in the CPU are made using virtual addresses, the following addresses must be offset appropriately. For non-cached reads/writes, add 0xA000 0000 to the address. As an example, to directly write to the AI_LENGTH register, use address 0xA450 0004.
Registers
Table Notation:
R = Readable bit W = Writable bit U = Undefined/Unused bit -n = Default value n at power on [x:y] = Specifies bits x to y, inclusively
AI_DRAM_ADDR 0x0450 0000
| ||||||||
|---|---|---|---|---|---|---|---|---|
| 31:24 | U-0 | U-0 | U-0 | U-0 | U-0 | U-0 | U-0 | U-0 |
| — | — | — | — | — | — | — | — | |
| 23:16 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 |
| DRAM_ADDR[23:16] | ||||||||
| 15:8 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 |
| DRAM_ADDR[15:8] | ||||||||
| 7:0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 | W-0 |
| DRAM_ADDR[7:0] | ||||||||
| bit 23-0 | DRAM_ADDR[23:0]: RDRAM address used for next DMA transfer |
Extra Details:
- Read access
- The register is write-only. Reading it returns a mirror of AI_LENGTH.